The present invention is directed to structures and methods useful for fabricating integrated circuits (ICs), in particular structures having a plurality of interconnect layers. More particularly, the present invention is directed to a method for improving the properties of tunable vapor deposited materials which function as antireflective coatings and/or as hardmasks for high resolution lithography.
The semiconductor industry continues to require devices with an increased device density and a concomitant decrease in device geometry. The continuous size reduction of the critical dimension (CD) of semiconductor devices creates an increasing challenge to balance the need for efficient etch resistance (i.e. resist thickness) with the demands of production-worthy depth-of-focus (DOF). Resist thickness is continuously thinned to accommodate reduced DOF which results from use of tools with higher numerical aperture (NA). As the thickness of the resist is decreased, the resist becomes less effective as a mask for subsequent dry etch image transfer to the underlying substrate, i.e. most if not all of the resist is etched away during the subsequent pattern transfer process. Without significant improvement in the etch selectivity exhibited by current single layer resists (SLR), these systems can not provide the necessary lithographic and etch properties for high resolution lithography.
Another problem with single layer resist systems is critical dimension (CD) control. Substrate reflections at ultraviolet (UV) and deep ultraviolet (DUV) wavelengths are notorious to produce standing wave effects and resist notching which severely limit CD control of single layer resists. Notching results from substrate topography and nonuniform substrate reflectivity which causes local variations in exposure energy on the resist. Standing waves are thin film interference (TFI) or periodic variations of light intensity through the resist thickness. These light variations are introduced because planarization of the resist presents different thickness through the underlying topography. Thin film interference plays a dominant role in CD control of single layer photoresist processes, causing large changes in the effective exposure dose due to a tiny change in optical phase.
Various antireflective coating (ARC) and hardmask materials have been developed to alleviate these problems of etch resistance and substrate reflections. Such materials include the tunable vapor deposited materials described in U.S. Pat. No. 6,316,167, the disclosure of which is incorporated herein by reference. These tunable materials have the composition R:C:H:X, wherein R is selected from Si, Ge, B, Sn, Fe, Ti and mixtures of these elements, and X is selected from O, N, S, F and mixtures of these elements, and X is optionally present. These materials will be referred to as tunable etch resistant ARC, or TERA. Compared to other hardmask materials such as polysilicon, TERA exhibits excellent etch selectivity to resist and to oxide. Selectivity of 1:2.5 to resist and 7:1 to oxide has been demonstrated. TERA is also envisioned as an antireflective layer, so no additional ARC is required for lithography processes using TERA. Thus, the mask open process is simplified, resulting in cost reduction.
However, lithography processes using TERA have been found to suffer from a large variation of CD post lithography, which limits a successful implementation of TERA as hardmask. The CD variation is attributed to the non-uniformity of as-deposited TERA properties across the wafer. Thus, there is a need in the art for a method to improve TERA uniformity and reduce CD variation across the wafer.